Socket P

Intel CPU socket


title: "Socket P" type: doc version: 1 created: 2026-02-28 author: "Wikipedia contributors" status: active scope: public tags: ["intel-cpu-sockets"] description: "Intel CPU socket" topic_path: "general/intel-cpu-sockets" source: "https://en.wikipedia.org/wiki/Socket_P" license: "CC BY-SA 4.0" wikipedia_page_id: 0 wikipedia_revision_id: 0

::summary Intel CPU socket ::

|name = Socket P |image = [[File:Socket P mPGA478MN-2406.jpg|300px]] |formfactors = Flip-chip pin grid array |contacts = 478 (not to be confused with the older Socket 478 or the similar Socket 479) |type = PGA |protocol = |fsb = 400 MT/s, 533 MT/s, 667 MT/s, 800 MT/s, 1066 MT/s |voltage = |processors = |dimensions = 35 mm × 35 mm ;Intel Core 2 Duo: T5xx0*, T6xx0, T7xx0*, T8x00, T9xx0, P7xx0, P8xx0, P9xx0 )

The Intel Socket P (mPGA478MN) is the mobile processor socket replacement for Core microarchitecture chips such as Core 2 Duo. It launched on May 9, 2007, as part of the Santa Rosa platform with the Merom and Penryn processors.

Technical specifications

::figure[src="https://upload.wikimedia.org/wikipedia/commons/0/02/Intel_Core_2_Duo_T9600_Dual-Core_Prozessor_(8600505511).jpg" caption="Intel Core 2 Duo T9600 CPU showing Socket P"] ::

The front-side bus (FSB) of CPUs that install in Socket P can run at 400, 533, 667, 800, or 1066 MT/s. By adapting the multiplier the frequency of the CPU can throttle up or down to save power, given that all Socket P CPUs support EIST, except for Celeron that do not support EIST. Socket P has 478 pins, but is not electrically pin-compatible with Socket M or Socket 478. Socket P is also known as a 478-pin Micro FCPGA or μFCPGA-478. On the plastic grid is printed mPGA478MN.

References

References

  1. "CPU list for socket P".

::callout[type=info title="Wikipedia Source"] This article was imported from Wikipedia and is available under the Creative Commons Attribution-ShareAlike 4.0 License. Content has been adapted to SurfDoc format. Original contributors can be found on the article history page. ::

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