Scorpion (processor)

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title: "Scorpion (processor)" type: doc version: 1 created: 2026-02-28 author: "Wikipedia contributors" status: active scope: public tags: ["arm-processors", "qualcomm-ip-cores"] topic_path: "general/arm-processors" source: "https://en.wikipedia.org/wiki/Scorpion_(processor)" license: "CC BY-SA 4.0" wikipedia_page_id: 0 wikipedia_revision_id: 0

::data[format=table title="Infobox CPU"]

Field	Value
name	Scorpion
produced-start	2008
slowest	800
fastest	1.7
slow-unit	MHz
fast-unit	GHz
designfirm	Qualcomm
manuf1	Qualcomm
arch	ARM, Thumb-2
numcores	1 or 2
l1cache	32 KiB/32 KiB
l2cache	256 KiB or 512 KiB
successor	Krait
::

| name = Scorpion | image = | image_size = | caption = | produced-start = 2008 | produced-end = | slowest = 800 | fastest = 1.7 | slow-unit = MHz | fast-unit = GHz | fsb-slowest = | fsb-fastest = | fsb-slow-unit = | fsb-fast-unit = | size-from = | size-to = | soldby = | designfirm = Qualcomm | manuf1 = Qualcomm | core1 = | pack1 = | brand1 = | arch = ARM, Thumb-2 | microarch = | cpuid = | code = | numcores = 1 or 2 | l1cache = 32 KiB/32 KiB | l2cache = 256 KiB or 512 KiB | l3cache = | application = | successor = Krait

Scorpion is a central processing unit (CPU) core designed by Qualcomm for use in their Snapdragon mobile systems on chips (SoCs). It was released in 2008. It was designed in-house, but has many architectural similarities with the ARM Cortex-A8 and Cortex-A9 CPU cores.

Overview

• 10/12 stage integer pipeline with 2-way decode, 3-way out-of-order speculatively issued superscalar execution
• Pipelined VFPv3 and 128-bit wide NEON (SIMD)
• 3 execution ports
• 32 KB + 32 KB L1 cache
• 256 KB (single-core) or 512 KB (dual-core) L2 cache
• Single or dual-core configuration
• 2.1 DMIPS/MHz
• 65/45/28 nm process

References

References

1. "Qualcomm High Performance Processor Core and Platform for Mobile Applications".
2. (February 21, 2012). "Qualcomm Snapdragon S4 (Krait) Performance Preview - 1.5 GHz MSM8960 MDP and Adreno 225 Benchmarks". [[Anandtech]].

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