NOP (code)

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title: "NOP (code)" type: doc version: 1 created: 2026-02-28 author: "Wikipedia contributors" status: active scope: public tags: ["machine-code", "computing-acronyms", "x86-instructions"] description: "Machine instruction that indicates to a computer to do nothing" topic_path: "technology/computing" source: "https://en.wikipedia.org/wiki/NOP_(code)" license: "CC BY-SA 4.0" wikipedia_page_id: 0 wikipedia_revision_id: 0

::summary Machine instruction that indicates to a computer to do nothing ::

In computer science, a NOP, no-op, or NOOP (pronounced "no op"; short for no operation) is a machine language instruction and its assembly language mnemonic, programming language statement, or computer protocol command that does nothing.

Machine language instructions

Some computer instruction sets include an instruction whose purpose is to not change the state of any of the programmer-accessible registers, status flags, or memory. It often takes a well-defined number of clock cycles to execute. In other instruction sets, there is no explicit NOP instruction, but the assembly language mnemonic NOP represents an instruction which acts as a NOP; e.g., on the SPARC, sethi 0, %g0.

A NOP must not access memory, as that could cause a memory fault or page fault.

A NOP is most commonly used for timing purposes, to force memory alignment, to prevent hazards, to occupy a branch delay slot, to render void an existing instruction such as a jump, as a target of an execute instruction, or as a place-holder to be replaced by active instructions later on in program development (or to replace removed instructions when reorganizing would be problematic or time-consuming). In some cases, a NOP can have minor side effects; for example, on the Motorola 68000 series of processors, the NOP opcode causes a synchronization of the pipeline.

Listed below are the NOP instruction for some CPU architectures:

::data[format=table]

CPU architecture	Instruction mnemonic	Bytes	Opcode	Notes
Intel x86 CPU family	NOP	1	url=https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html	title=Intel 64 and IA-32 Architectures Software Developer's Manual: Instruction Set Reference A-Z
multi-byte NOP	2–9 for Pentium Pro and later Intel processors, and all AMD AMD64 processors	0x66 0x90
0x66 is the operand-size override prefix.
FNOP	2	0xD9 0xD0	x87 floating-point coprocessor no-operation
Intel 8008	LAA	1	0xC0	Load A from A
Intel 8048 / MCS-48 family	NOP	1	0x00
Intel 8051 / MCS-51 family	NOP	1	0x00
Intel 8080, 8085, Zilog Z80	NOP	1	0x00
Intel i860	NOP	4	0xA0000000	Core no-operation. Opcode for shl r0,r0,r0, an instruction to left-shift the all-0s register by itself.
FNOP	4	0xB0000000	Floating-point no-operation. Opcode for shrd r0,r0,r0, a shift-right-double instruction that takes the all-0s register as input and output.
Intel i960	MOV g0,g0	4	0x5C801610	Move global register g0 to itself. Suggested opcode for cases where a no-op is needed.
Intel IA-64 (Itanium)	(qp) NOP.b imm21	41 bits	0x04000000000	On IA-64, the NOP instruction has five forms, each of which can be executed only on a particular execution unit type.
(qp) NOP.f imm21	41 bits	0x00008000000
(qp) NOP.i imm21
(qp) NOP.m imm21
(qp) NOP.x imm62	41+41 bits	0x00008000000 imm41
32-bit ARM (A32)	NOP	4	0x*320F000	publisher=ARM
MOV r0,r0/NOP	4	0xE1A00000	publisher=ARM	url=https://documentation-service.arm.com/static/604f2c8aefb1a112dce66ba1
ANDEQ r0,r0,r0	4	0x00000000	author=O. Smith	url=https://groups.google.com/g/comp.sys.arm/c/KDFGkeBRTPk/m/G5CMf41k-0QJ
MOVNV r0,r0	4	0xF1A00000	publisher=Acorn Computers	url=https://www.4corn.co.uk/archive/docs/Acorn%20Assembler%20Release%202-opt.pdf
Thumb	MOV r8,r8/NOP	2	0x46C0	Recommended Thumb no-operation encoding for older 32-bit Thumb processors that pre-date ARMv6T2. Assemblers for T32 will usually output this opcode when given the "NOP" mnemonic unless they are told to target ARMv6T2 or later versions of the ARM Thumb architecture.
Thumb-2 (T32)	NOP	2	0xBF00	Architectural ARM T32 (Thumb-2) NOPs ("true" nops, with no register dependencies). Introduced with ARMv6T2 (ARM 1156, released in 2003), and present in all later ARM T32 processors.
NOP.W	4	0xF3AF8000
64-bit ARM (A64)	NOP	4	0xD503201F	Architectural NOP
DEC Alpha	NOP	4	0x47FF041F	publisher=Compaq
FNOP	4	0x5FFF041F	Floating-point NOP. Opcode for CPYS f31,f31,f31, an instruction that performs copy-sign with the always-0 register as source for both sign and exponent/mantissa, and stores the result in the always-0 register.
UNOP	4	0x2FFE0000	author1=JH Edmondson	url=https://acg.cis.upenn.edu/milom/cis501-Fall09/papers/Alpha21164.pdf
AMD 29k	NOP	4	0x70400101	Opcode for aseq 0x40,gr1,gr1, an instruction that asserts that the stack register is equal to itself.
AVR	NOP	2	0x0000	one clock cycle
COP400	NOP	1	0x44
COP8	NOP	1	0xB8
HP 3000	NOP	2	0x0000	HP 3000 stack operation instructions have most-significant four bits of 0 followed by two 6-bit stack opcodes, with stack NOP (0) used to pad when needed. 0x0000 would be NOP, NOP.
Hyperstone E1	NOP	2	0x0300	Opcode for CHK L0,L0, a range-check instruction which produces an exception if the L0 register is greater than itself.
IBM System/360, IBM System/370, IBM System/390, z/Architecture, UNIVAC Series 90	NOP	4	0x47000000 or 0x470nnnnn or 0x47n0nnnn where "n" is any 4-bit value.	The NOP ("No-Op") and NOPR ("No-Op Register") are a subset of the "Branch on Condition" or "Branch on Condition Register" instructions, respectively; both versions have two options for generating a NO-OP.
NOPR	2	0x0700 or 0x070n or 0x07n0 where "n" is any 4-bit value.
LoongArch	NOP	4	0x03400000	Opcode for andi r0,r0,0, an instruction that bitwise-ANDs the always-0 register with zero.
MicroBlaze	NOP	4	0x80000000	Opcode for or r0,r0,r0, an instruction that bitwise-ORs the always-0 register with itself.
MIPS	NOP	4	0x00000000	Stands for sll r0,r0,0, meaning: Logically shift register 0 zero bits to the left and store the result in register 0. Writes to register 0 are ignored; it always contains 0.
MIPS-X	NOP	4	0x60000019	(extended opcode for add r0,r0,r0)
MIX	NOP	1 word	± * * * * 0	The * bytes are arbitrary, and can be anything from 0 to the maximum byte (required to be in the range 63-99). MIX uses sign-magnitude representation.
MMIX	SWYM	4	0xFD******	SWYM stands for "Sympathize with your machinery". The * digits can be chosen arbitrarily.
MOS Technology 65xx (e.g. 6502),
WDC 65C816	NOP	1	0xEA	NOP consumes two clock cycles. Undefined opcodes in the NMOS versions of the 65xx family were converted to be NOPs of varying instruction lengths and cycle times in the 65C02.
Motorola 6800	NOP	1	0x01
Motorola 68000 family	NOP	2	0x4E71	This synchronizes the pipeline and prevents instruction overlap.
TRAPF,
TRAPF.W #data,
TRAPF.L #data	2,
4,
6	0x51FC,
0x51FA 0xnnnn,
0x51FB 0xnnnn 0xnnnn	Trap if false.
Motorola 6809	NOP	1	0x12
Motorola 88000 family	BCND lt0,r0,X,
ADD r0,r0,r0,
TB1 0,r0,x	4	0xE980xxxx,
0xF4007000,
0xF000D8xx	Branch if always-0 register is less than 0,
Add always-0 register to itself,
Trap if bit 0 of always-0 register is 1 (serializing).
MSP430	NOP	2	0x4303	Opcode for mov #0,r3 or mov r3,r3, an instruction that performs a move from a "constant generation register" to itself.
PA-RISC	NOP	4	0x08000240	Opcode for OR 0,0,0.
LDI 26,0	4	0x34000034	Palindromic NOP – that is, an instruction that executes as NOP regardless of whether byte order is interpreted as little-endian or big-endian. Some PA-RISC system instructions are required to be followed by seven palindromic NOPs.
PDP-6, PDP-10	JFCL 0, (conventional)
JUMP, SETA, SETAI, CAI, TRN, TLN	1 word	25500******* (octal)	Jump never
Jump never, set nothing, skip never
PDP-11	NOP	2	000240 (octal)	Clear none of the condition codes
PIC microcontroller	NOP	12 bits	0b000000000000	Clearing the Flash memory of the microcontroller causes it to be reset to all 1s, which does not represent the NOP instruction.
POWER, PowerPC, Power ISA	NOP	4	0x60000000	Opcode for ori r0,r0,0.
RISC-V	NOP	4	0x00000013	ADDI x0, x0, 0
C.NOP	2	0x0001	C.ADDI x0, 0. Only available on RISC-V CPUs that support the "C" (compressed instructions) extension.
Signetics 8X300	MOV AUX, AUX	2 (16 bits)	0x0000	Move AUX to AUX with no rotate
SPARC	NOP	4	0x01000000	Stands for sethi 0, %g0 which zeroes the hardwired-to-zero %g0 register{{cite book
Sunplus S+core	NOP	4	0x80008000	Architectural NOPs
NOP!	2	0x0000
SuperH	NOP	2	0x0009
NOP	4	0x6FF0FFF0	32-bit NOP, present on SH-5 only.
Tensilica Xtensa	NOP, _NOP	3	0x0020F0	Assemblers may convert "NOP" to "NOP.N" – the "_NOP" mnemonic (with a leading underscore) can be used to prevent such conversion.
NOP.N	2	0xF03D
VAX	NOP	1	0x01	Delay is dependent on processor type.
WD16	NOP	2	0x0000
::

From a hardware design point of view, unmapped areas of a bus are often designed to return zeroes; since the NOP slide behavior is often desirable, it gives a bias to coding it with the all-zeroes opcode.

Code

A function or a sequence of programming language statements is a NOP or null statement if it has no effect. Null statements may be required by the syntax of some languages in certain contexts.

Ada

In Ada, the null statement serves as a NOP. As the syntax forbids that control statements or functions be empty, the null statement must be used to specify that no action is required. (Thus, if the programmer forgets to write a sequence of statements, the program will fail to compile.)

C and derivatives

The simplest NOP statement in C is the null statement, which is just a semi-colon in a context requiring a statement.

Most C compilers generate no code for null statements, which has historical and performance reasons. ; An empty block (compound statement) is also a NOP, and may be more legible, but will still have no code generated for it by the compiler. {} In some cases, such as the body of a function, a block must be used, but this can be empty. In C, statements cannot be empty—simple statements must end with a ; (semicolon) while compound statements are enclosed in {} (braces), which does not itself need a following semicolon. Thus in contexts where a statement is grammatically required, some such null statement can be used.

The null statement is useless by itself, but it can have a syntactic use in a wider context, e.g., within the context of a loop: ::code[lang=c] while (getchar() != '\n') {} ::

alternatively, ::code[lang=c]

while (getchar() != '\n') ; ::

or more tersely: ::code[lang=c]

while (getchar() != '\n'); ::

The last form might generate a warning with some compilers or compiler options, as a semicolon placed after a parenthesis at the end of a line usually indicates the end of a function call expression.

The above code continues calling the function getchar() until it returns a \n (newline) character, essentially fast-forwarding the current reading location of standard input to the beginning of next line.

Fortran

In Fortran, the CONTINUE statement is used in some contexts such as the last statement in a DO loop, although it can be used anywhere, and does not have any functionality.

JavaScript

The JavaScript language does not have a built-in NOP statement. Many implementations are possible:

• Use the ; empty statement or the {} empty block statement the same way as in the C and derivatives examples;
• Use the undefined or the null expression as a complete statement (an expression statement) when the previous methods are not allowed by the syntax. Alternatives, in situations where a function is required, are:
• Use the Function.prototype() built-in function, that accepts any arguments and returns undefined;
• Use a NOP function available in a third-party library —see below;
• Define a custom NOP function, as in the following example (using the ES6 arrow function syntax): ::code[lang=javascript] const noop = () => {};

==== AngularJS ==== The [[AngularJS]] framework provides [https://docs.angularjs.org/api/ng/function/angular.noop angular.noop] function that performs no operations.

==== jQuery ==== The [[jQuery]] library provides a function jQuery.noop(), which does nothing.[http://api.jquery.com/jquery.noop/ jQuery.noop()] from jQuery API documentation

==== Lodash ==== The [[Lodash]] library provides a function _.noop(), which returns undefined and does nothing.{{Cite web|url=https://lodash.com/docs/#noop|title=Lodash Documentation|website=lodash.com|language=en|access-date=2017-12-15}}

=== Pascal === As with C, the ; used by itself can be used as a null statement in [[Pascal (programming language)|Pascal]]. In fact, due to the specification of the language, in a BEGIN / END block, the semicolon is optional before the END statement, thus a semicolon used there is superfluous.

Also, a block consisting of BEGIN END; may be used as a placeholder to indicate no action, even if placed inside another BEGIN / END block.

=== Python === The [[Python (programming language)|Python]] programming language has a [[Python (programming language)#Statements and control flow|pass statement]] which has no effect when executed and thus serves as a NOP. It is primarily used to ensure correct syntax due to Python's [[off-side rule|indentation-sensitive syntax]]; for example the syntax for definition of a [[class (programming)|class]] requires an indented block with the class logic, which has to be expressed as pass when it should be empty.

=== Shell scripting (bash, zsh, etc.) === The ':' [colon] command is a shell builtin that has similar effect to a "NOP" (a do-nothing operation). It is not technically an NOP, as it changes the special parameter $? (exit status of last command) to 0. It may be considered a synonym for the shell builtin 'true', and its exit status is true (0).{{cite web |url=http://tldp.org/LDP/abs/html/special-chars.html |work=Advanced Bash-Scripting Guide |title=Chapter 3. Special Characters}}bash manpage > SHELL BUILTIN COMMANDSzsh manpage (zshbuiltins) > SHELL BUILTIN COMMANDS

=== TeX macro language (ConTeXt, LaTeX, etc.) === The [[TeX]] typographical system's macro language has the \relax command.{{cite book |last1=Bausum |first1=David |title=TeX Reference Manual |date=2002 |publisher=Kluwer Academic Publishers |url=https://www.tug.org/utilities/plain/cseq.html#relax-rp |access-date=1 April 2020 |chapter=TeX Primitive Control Sequences |quote=According to The TeXbook, 'TeX does nothing' when it encounters \relax. Actually, \relax may tell TeX, 'This is the end of what you've been doing'.}} It does nothing by itself, but may be used to prevent the immediately preceding command from parsing any subsequent tokens.TeX wikibook – [https://en.wikibooks.org/wiki/TeX/relax relax]

== NOP protocol commands == Many [[protocol (computing)|computer protocol]]s, such as [[telnet]], include a NOP command that a client can issue to request a response from the server without requesting any other actions. Such a command can be used to [[Keepalive|ensure the connection is still alive]] or that the server is responsive. A NOOP command is part of the following protocols (''this is a partial list''):

• [[telnet]]
• [[File Transfer Protocol|FTP]]
• [[Simple Mail Transfer Protocol|SMTP]]
• [[X Window core protocol|X11]]
• [[Post Office Protocol|POP3]]
• [[Network News Transfer Protocol|NNTP]]
• [[Finger protocol|finger]]
• [[Internet Message Access Protocol|IMAP4]]
• [[BitTorrent (protocol)|BitTorrent]]

Unlike the other protocols listed, the IMAP4 NOOP command has a specific purpose—it allows the server to send any pending notifications to the client.

While most [[telnet]] or [[FTP]] servers respond to a NOOP command with "OK" or "+OK", some programmers have added quirky responses to the client. For example, the ftpd daemon of [[MINIX]] responds to NOOP with the message:{{cite web|url=http://www.cise.ufl.edu/~cop4600/cgi-bin/lxr/http/source.cgi/commands/ftpd/ftpd.c#L139|title=ftpd.c|access-date=2016-06-19}} [[List of FTP server return codes|200]] NOOP to you too!

== Cracking == NOPs are often involved when [[Software cracking|cracking]] software that checks for serial numbers, specific hardware or software requirements, presence or absence of hardware [[dongle]]s, etc. in the form of a [[NOP slide]]. This process is accomplished by altering [[Subroutine|functions and subroutines]] to bypass security checks and instead simply return the expected value being checked for. Because most of the instructions in the security check routine will be unused, these would be replaced with NOPs, thus removing the software's security functionality without altering the positioning of everything which follows in the binary.

== Security exploits == The NOP opcode can be used to form a [[NOP slide]], which allows code to execute when the exact value of the instruction pointer is indeterminate (e.g., when a buffer overflow causes a function's return address on the stack to be overwritten).

== See also ==

• [[Comment (computer programming)]] – annotations generally for programmers that are ignored by compilers and interpreters
• [[Computer architecture]]
• [[Filler text]]
• [[Halt and Catch Fire (computing)|Halt and Catch Fire]] – also pauses the CPU
• [[HLT (x86 instruction)]] – pauses the CPU
• [[Identity function]] – the functional programming equivalent to NOP
• [[IEFBR14]] – mainframe tautology
• [[xyzzy (computing)]] – a command sometimes used instead of NOP
• [[X86 instruction listings#Added in P5/P6-class processors]] – NOPL, the official long NOP

== References == {{reflist}}

{{DEFAULTSORT:Nop}} [[Category:Machine code]] [[Category:Computing acronyms]] [[Category:X86 instructions]] ::

References

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